Frontiers of Optoelectronics, Volume. 4, Issue 2, 146(2011)

Charge trapping memory devices employing multi-layered Ge/Si nanocrystals for storage fabricated with ALD and PLD methods

Guangli WANG, Yi SHI*, Lijia PAN, Lin PU, Jin LV, Rong ZHANG, and Youdou ZHENG
Author Affiliations
  • School of Electronic Science and Technology, Key Laboratory of Photonic and Electronic Materials, Nanjing University, Nanjing 210093, China
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    The Ge/Si nanocrystals on ultra thin high-k tunnel oxide Al2O3 were fabricated to form the charge trapping memory prototype with asymmetric tunnel barriers through combining the advanced atomic layer deposition (ALD) and pulse laser deposition (PLD) techniques. Charge storage characteristics in such memory structure have been investigated using capacitance-voltage (C-V) and capacitance-time (C-t) measurements. The results prove that both the two-layered and three-layered memory structures behave relatively qualified for the multi-level cell storage. The results also demonstrate that compared to electrons, holes reach a longer retention time even with an ultra thin tunnel oxide owing to the high band offset at the valence band between Ge and Si.

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    Guangli WANG, Yi SHI, Lijia PAN, Lin PU, Jin LV, Rong ZHANG, Youdou ZHENG. Charge trapping memory devices employing multi-layered Ge/Si nanocrystals for storage fabricated with ALD and PLD methods[J]. Frontiers of Optoelectronics, 2011, 4(2): 146

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    Paper Information

    Received: Sep. 15, 2010

    Accepted: Sep. 30, 2010

    Published Online: Sep. 21, 2012

    The Author Email: SHI Yi (yshi@nju.edu.cn)

    DOI:10.1007/s12200-011-0156-7

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