Vertical cavity surface emitting laser (VCSEL) has advantages such as low threshold, single longitudinal mode, circular symmetric spot, high efficiency, high modulation rate, small size, easy two-dimensional integration, and low cost. Therefore, it is widely used in optical communication, infrared lighting, and medical fields. The research on 1060 nm VCSEL in China and abroad mainly focuses on the field of low-power and low-loss optical communication, while there are few reports on high-power 1060 nm VCSEL. The 1060 nm VCSEL is mainly composed of the active region and top and down distributed Bragg reflectors (DBRs). Due to the high composition of InGaAs quantum wells, excessive strain can easily lead to poor material growth quality in the active region. Thus, strain-compensated quantum well active region and the DBR structural parameters will affect the output power and efficiency of the VCSEL. It is necessary to optimize the design of the strain-compensated quantum well active region and DBR structure to improve the performance of the 1060 nm VCSEL. We optimize the overall structure of the 1060 nm VCSEL epitaxial structure. In addition, we compare quantum wells of six different InGaAs components and thicknesses and analyze the gain and output characteristics of three barrier materials in the quantum well active region. We optimize the DBR for different gradient layer thicknesses and pairs. VCSEL single and array characteristics are fabricated and tested experimentally.

The red-shift velocity of the 1060 nm VCSEL is calculated to be 0.40 nm/K by PICS3D simulation software to determine the appropriate gain and cavity mode mismatch of -20 nm. By comparing and analyzing the gain spectra and peak gain of six different InGaAs components and thicknesses with temperature changes, as well as the output power, it is simulated that the In_0.28Ga_0.72As quantum well with a thickness of 8 nm has better gain and output characteristics at high temperatures. Serious carrier leakage from too-thin quantum wells and low peak gain for too-thick ones are unfavorable for improving output characteristics. The peak gain of GaAs_0.8P_0.2, Al_0.1Ga_0.9As, and GaAs barrier layers is compared with temperature changes, transparent carrier concentration, and output power. It is shown that the 10 nm GaAs_0.8P_0.2 barrier material has a lower threshold, higher output power, and high-temperature characteristics. Under 30 mA injection current, the output power of a 15 μm oxide aperture VCSEL device with GaAs_0.8P_0.2 barrier layer is 21.95 mW. We simulate and calculate the DBR reflection spectrum bandwidth, reflection spectrum, and reflectivity of different DBR pairs for different gradient layer thicknesses, providing theoretical guidance for optimal design. The simulation results show that the P-DBR gradient layer thickness of 20 nm and the DBR pairs of 18 pairs are beneficial for reducing series resistance and improving output power. VCSEL epitaxial structures in the active region of In_0.28Ga_0.72As/GaAs_0.8P_0.2 quantum wells are grown using metal organic chemical vapor deposition (MOCVD), and corresponding VCSEL single and arrays are experimentally fabricated.

Fabrication and packaging testing of 1060 nm VCSEL single are conducted. The experimental measurement shows that the 1060 nm VCSEL single element of 15μm has a continuous output power of 20 mW at 30 mA and a threshold current of 1.6 mA [Fig. 7(a)]. The experimental and theoretical results are consistent, that is, the 8 nm thick In_0.28Ga_0.72As well layer and the 10 nm thick GaAs_0.8P_0.2 barrier layer have better temperature and output characteristics. For the 288-element 1060 nm VCSEL array, the continuous output power is 2.62 W at 4.5 A, and the maximum electro-optical conversion efficiency is 36.8% [Fig. 7(b)]. Under quasi-continuous conditions (pulse width is 100 μs and duty cycle is 1%), the 5 mm×5 mm 1060 nm VCSEL array has a peak power of 53.4 W at 100 A [Fig. 7(c)]. The spectra of 288-element arrays are tested at different currents. Under continuous operating conditions at room temperature, the peak wavelengths of the VCSEL array are 1063.2, 1063.7, 1064.3, 1065.7, and 1067.2 nm, respectively, at currents of 0.5, 1.5, 2.5, 3.5, and 4.5 A (Fig. 8). Based on the temperature drift coefficient of the VCSEL wavelength, which is about 0.065 nm/K, the temperature rise of the VCSEL array is calculated to be 61.54 °C when the current increases from 0.5 to 4.5 A.

In this paper, theoretical simulation and experimental research are implemented on the high-power and high-efficiency 1060 nm VCSEL. Epitaxial structure parameters such as In_0.28Ga_0.72As/GaAs_0.8P_0.2 quantum well active region parameters and DBR parameters with better output characteristics are obtained by considering the gain characteristics, transparent carrier concentration, and series resistance. VCSELs with InGaAs/GaAsP strain compensated quantum well structures are grown by metal organic chemical vapor deposition technology, and single and array VCSELs are fabricated. The experimental data and theoretical analysis are consistent. Experimental measurement shows that the 1060 nm VCSEL single element of 15 μm oxidation aperture continuous output power is 20 mW at 30 mA. For the 288-element 1060 nm VCSEL array, the continuous output power is 2.62 W at 4.5 A, and the maximum electro-optical conversion efficiency is 36.8%. Under quasi-continuous conditions (pulse width is 100 μs and duty cycle is 1%), the 5 mm×5 mm 1060 nm VCSEL array has a peak power of 53.4 W at 100 A. The related theoretical simulation work is a good theoretical guide for achieving high-power, high-efficiency, and low-threshold 1060 nm VCSELs.