In All-Digital Transmitter(ADTx) system, Radio Frequency Pulse Width Modulation(RF-PWM) encodes the amplitude and phase information of baseband modulation signal into the width and position of output pulse. Due to the non-ideal characteristics of digital signal processing devices, the rising edge and falling edge of the clock signal have jitter errors, which affects the output signal quality of RF-PWM. Based on three RF-PWM implementation schemes, the distortion term caused by timing jitter is determined by formula derivation, and the mathematical analytical expressions of the noise floor of different schemes' output pulse signals under the influence of timing jitter are given. Finally, Matlab is employed to simulate and verify the fundamental, odd harmonic and noise floor of different schemes under the condition of timing jitter, which proves the correctness of theoretical derivation. At the same time, the Error Vector Magnitude(EVM) and Adjacent Channel Power Ratio(ACPR) of signal are simulated, and the influence of timing jitter on the performance of signal in-band and out-of-band is analyzed. The results show that the nonlinear distortion caused by timing jitter is mainly reflected in the improvement of noise floor. For different RF-PWM implementation schemes, the influence characteristics of timing jitter are different, among which the five-level scheme has a restraining effect on timing jitter, and it increases with the increase of time resolution.