An embedded pattern recognition method for heterodyne phase-sensitive optical time-domain recognition (Φ-OTDR) technique with high signal-to-noise ratio (SNR), high resolution and low cost is proposed based on analog down conversion, digital IQ demodulation and back propagation (BP) neural network. When we use a digital signal processor (DSP), field programmable gate array (FPGA) and a peripheral circuit to replace GHz data acquisition and signal generator, cost and size are reduced. A method based on time and space two-dimensional extracting morphological features is designed, and the BP neural network is used to multi-class recognition. Compared with the traditional mode recognition for one-dimensional signal, the proposed method can achieve lower false alarm rate and higher recognition rate. Experiment results show that designed embedded parallel signal processing architecture based on FPGA+DSP can satisfy the real-time monitoring requirements. SNR of the system is 12.43 dB and the event recognition rate is 97.78%.