In the half-bridge gate driver, the low voltage domain PWM signal needs to be converted into a high-side floating voltage domain PWM signal through a level shifter, thereby turning on or off the high-side power transistor. The fast floating of the floating power rail will cause dV/dt noise, which affects the reliability of the signal transmission of the level shifter. In this paper, the auxiliary circuits were designed to prevent false turn-on and turn-off respectively in the level shifter. When the upper bridge arm turned on, once detecting dV/dt noise, the auxiliary circuit for preventing false shutdown could keep the output of the level shifter in a high level state to prevent the upper bridge arm from being turned off by mistake. When the upper bridge arm turned off, once detecting dV/dt noise, the auxiliary circuit for preventing false turn-on could keep the output of the level shifter in a low level state to prevent the upper bridge arm from being turned on by mistake. Based on 0.18 μm BCD process simulation verification, the designed level shifter has only 1.2 ns turn-on transmission delay, and 100 V/ns dV/dt slewing immunity.