Microelectronics, Volume. 53, Issue 5, 820(2023)

A Low Power Approximate Multiplier Based on Novel 4-1 Compressor

PENG Zeyang, HOU Bowen, and HE Yajuan
Author Affiliations
  • [in Chinese]
  • show less

    With the rapid development of the cloud computing, internet of things and artificial intelligence, terminal devices are facing great challenges in hardware resources and power consumption. In order to reduce the power consumption of computing units, two kinds of low power approximate 8-bit multipliers based on novel 4-1 compressors were proposed. Based on analysis of the errors of 4-1 compressors, an error compensation module was designed to reduce the precision loss. The simulation results show that, compared with the exact multiplier, the delay of the proposed multipliers was reduced by 5.67% and 18.23%, the area by 6.54% and 20.36%, and the power consumption by 15.83% and 30.94%, respectively. Finally, the proposed multipliers are applied to image sharpening, which verify its validity in error-tolerant applications.

    Tools

    Get Citation

    Copy Citation Text

    PENG Zeyang, HOU Bowen, HE Yajuan. A Low Power Approximate Multiplier Based on Novel 4-1 Compressor[J]. Microelectronics, 2023, 53(5): 820

    Download Citation

    EndNote(RIS)BibTexPlain Text
    Save article for my favorites
    Paper Information

    Category:

    Received: Feb. 16, 2023

    Accepted: --

    Published Online: Jan. 3, 2024

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.230063

    Topics