A 25 Gb/s optical receiver front-end amplifying circuit was designed in a 0.13 μm SiGe BiCMOS process. This amplifying circuit realized the monolithic integration of the front-end amplifier circuit of the optical receiver. The transimpedance amplifier with feedback system, inductance peaking technology, automatic gain control circuit and other disign were adopted to improve the gain, bandwidth and system stability effectively. The results of simulation and experimental test show that the gain is up to 69.9 dB with a bandwidth of 19.1 GHz. Moreover, the bandwidth error is kept less than 0.1% under the industrial-grade working temperature (-40 ℃~+85 ℃). The power supply current is 45 mA with the power consumption of 81 mW, and the jitter RMS (root mean square) value is 5.8 ps, which indicate a good performance and stability. This design proposes a design method that can be applied to 100 Gbit/s (25 Gbit/s×4 lines) optical interconnection system, which has a broad application prospect.